In recent years, a one-bit encoding technique employing ΔΣ modulation has been widely applied to fields relating to a digital audio system, an AD/DA conversion device, and the like. For example, the ΔΣ modulation has been employed in a D-Class amplifier which amplifies an input signal by switching a transistor. Unlike an A-Class amplifier that works while the transistor is in a linear region (unsaturated region), the D-Class amplifier operates while the transistor is in a nonlinear region (saturated region). Therefore, the D-Class amplifier has an advantage of being capable of amplifying electric power highly efficiently.
The D-Class amplifier switches over constant voltages to each other in accordance with an input signal. Basically, the D-Class amplifier outputs a binary, that is, (i) a voltage corresponding to an input signal indicating “ON” and (ii) a voltage corresponding to an input signal indicating “OFF”. In other words, the D-Class amplifier amplifies a binary input indicating “ON/OFF”. Accordingly, for example, in a case where an audio signal is amplified by use of the D-Class amplifier, first, a binary signal indicating the audio signal is created. In other words, it is necessary to encode the audio signal into a one-bit signal. A method adopting the ΔΣ modulation has been put into practical use in encoding the audio signal into the one-bit signal.
FIG. 13 is a view illustrating an arrangement of a conventional ΔΣ modulation one-bit amplifier. The ΔΣ modulation D-Class amplifier includes a DA converter (DAC) 50, a subtractor 51, a group of analogue integrators 52, a quantizer 53, a D-Class amplifier 54, a low-pass filter 55, and a speaker 56. The ΔΣ modulation one-bit amplifier amplifies an input signal that is encoded by PCM (Pulse Code Modulation), and outputs an analogue signal converted and amplified from the input signal. The following description explains how each component of the ΔΣ modulation one-bit amplifier is operated.
The DAC 50 receives a digital signal that is encoded from an audio signal by the PCM. The DAC 50 converts the inputted digital signal into an analogue signal, and outputs the analogue signal to the subtractor 51. Further, a switching pulse that is outputted from the D-Class amplifier 54 is fed back to the subtractor 51. The switching pulse outputted from the D-Class amplifier 54, and the feedback will be described later more specifically.
The subtractor 51 subtracts, from the analogue signal received from the DAC 50, the switching pulse that is fed back from the D-Class amplifier 54, so as to create a difference signal. Then, the subtractor 51 outputs the difference signal to the group of analogue integrators 52. The group of analogue integrators 52 integrates the difference signal received from the subtractor 51, and then outputs the difference signal to the quantizer 53.
The quantizer 53 quantizes, at every predetermined sampling cycle, the input received from the group of analogue integrators 52, so as to create a binary quantized signal, i.e. “0” or “1”. Then, the quantizer 53 outputs the quantized signal to the D-Class amplifier 54.
The D-Class amplifier 54 carries out the switching in accordance with the quantized signal, so as to change over a constant voltage to another constant voltage. This generates a high-voltage switching pulse corresponding to the quantized signal, in other words, the quantized signal is amplified. The D-Class amplifier 54 outputs the switching pulse to the low-pass filter 55. The low-pass filter 55 smoothes the switching pulse so as to demodulate the switching pulse. Then, the low-pass filter 55 outputs, from the speaker 56, the switching pulse as such an analogue signal that an original audio signal is amplified.
As described above, the ΔΣ modulation one-bit amplifier includes a feedback loop which negatively feeds back, to the subtractor 51, the switching pulse outputted from the D-Class amplifier 54. This makes it possible to feed back, to the subtractor 51, analogue information (including power source fluctuation noise, a switching error component, and the like) which is included in the output of the D-Class amplifier 54. Accordingly, the power source fluctuation noise and the switching error component can be compensated so that an SNR (Signal to Noise Ratio) is improved and a “THD (Total Harmonic Distortion)+N (Noise)” is reduced.
However, since the feedback loop for feeding back the analogue information is provided in the arrangement of this ΔΣ modulation one-bit amplifier, it is necessary for the arrangement to include the DAC 50 or the like. This increases costs.
FIG. 14 is a view illustrating an arrangement of a conventional ΔΣ modulation one-bit amplifier which does not include a feedback loop for feeding back the analogue information.
This ΔΣ modulation one-bit amplifier includes: a subtractor 60; a group of digital integrators 61; a quantizer 62; a D-Class amplifier 63; a low-pass filter 64; and a speaker 65. The subtractor 60, the group of the digital integrators 61, and the quantizer 62 constitute a ΔΣ modulation section 66. This ΔΣ modulation one-bit amplifier amplifies an input signal that has been digitally-encoded by the PCM, and then outputs an analogue signal thus prepared from the input signal. The following description deals with how each component of the ΔΣ modulation one-bit amplifier is operated.
The subtractor 60 receives a digital signal that has been encoded from an audio signal by the PCM. Further, a quantized signal outputted from the quantizer 62 is fed back to the subtractor 60. The quantized signal outputted from the quantizer 62, and the feedback will be described later more specifically.
The subtractor 60 subtracts, from the input signal (that is, the digital signal that is encoded from an audio signal by the PCM), the quantized signal that is fed back from the quantizer 62, so as to create a difference signal. Then, the subtractor 60 outputs the difference signal to the group of digital integrators 61.
The group of digital integrators 61 integrates the difference signal received from the subtractor 60, and then outputs the difference signal to the quantizer 62. The quantizer 62 quantizes, at every predetermined sampling cycle, the input received from the group of digital integrators 61, so as to create a binary quantized signal indicating “0” and “1”. Then, the quantizer 62 outputs the quantized signal to the D-Class amplifier 63.
The D-Class amplifier 63 carries out the switching in accordance with the quantized signal, so as to change over a constant voltage to another constant voltage. This generates a high-voltage switching pulse corresponding to the quantized signal, in other words, the quantized signal is amplified. The D-Class amplifier 63 outputs the switching pulse to the low-pass filter 64. The low-pass filter 64 smoothes and demodulates the switching pulse, and outputs an analogue signal from the speaker 65, the analogue signal thus prepared from the original audio signal. As described above, the ΔΣ modulation section 66 includes a feedback loop for negatively feeding back, to the subtractor 60, the quantized signal outputted from the quantizer 62.
Further, in recent years, for an audio amplifier employing a D-Class amplifier (switching amplifier), a technique employing the ΔΣ modulation has been proposed. For example, Patent Literature 1 discloses a technique for suppressing harmonic distortion of a signal for driving the switching amplifier (D-Class amplifier).
In an arrangement disclosed in Patent Literature 1, (i) a PWM (Pulse Width Modulation) signal is created in such a manner that an inputted digital signal is quantized by a ΔΣ converter, and then is subjected to PWM, and (ii) the switching amplifier is driven by the PWM signal. Harmonic distortion due to the PWM is estimated in advance, and suppressed by canceling out a component of the harmonic distortion. The estimation of the harmonic distortion in advance may be based on a linear combination of a product with the use of an original signal, and signals indicating first-order and second-order temporal differential signals of a continuous-time signal corresponding to the original input signal. At that time, a fundamental harmonic component which is generated due to a third-order distortion is taken into consideration.
Further, Patent Literature 2 discloses a technique in which, in a ΔΣ digital-analogue converter and an output amplifying circuit, each of which includes a ΔΣ conversion circuit, a PWM circuit, and a distortion compensation circuit, a second-order harmonic generated in the PWM circuit or a PWM signal received from the PWM circuit is inputted, so that generation of a second-order harmonic in a D-Class amplifier or the like is suppressed.
Citation List
Patent Literature
Japanese Patent Application Publication, Tokukai, No. 2006-115028 A (Publication Date: Apr. 27, 2006)
Patent Literature 2
Japanese Patent Application Publication, Tokukai, No. 2003-133959 A (Publication Date: May 9, 2003)